The present invention relates to a demodulator for demodulating signals obtained by MSK (minimum shift keying) modulating digital signals.
MSK demodulators of this type serve to receive an MSK modulation signal (hereinafter referred to as MSK signal), which is obtained by MSK modulating symbols represented by digital signals, and demodulates the MSK signal to restore the symbols. In MSK modulation, for instance representing each symbol with binary signal "1" or "0", the binary signal "1" is expressed by one cycle of frequency f, and the binary signal "0" is expressed by half cycle of frequency f/2. This means that a binary signal is assigned to each predetermined time slot. It will be seen that where modulation signals of frequencies f and f/2 are corresponded by the binary signals "1" and "0", respectively, each of these modulation signals can take two different states. Where the binary signal "0" is expressed by half cycle of frequency f/2, the modulation signal may take either positive or negative half cycle in one time slot. This also applies to the binary signal "1".
Transition from a binary signal to the next one is either from "1" to "1", from "1" to "0", from "0" to "0" or from "0" to "1". Where the above frequencies are assigned to binary signals which present the above transitions, waveform discontinuities may arise at transition instants of modulation signal. In an actual MSK demodulator, usually each binary signal is sampled a plurality of times during one time slot to provide a sample signal.
In a usual MSK demodulator, an exclusive OR signal which represents the relation between adjacent modulation signals, is obtained by exclusively ORing a binary signal sequence and a delay signal obtained by delaying each binary signal by one symbol time (i.e., one time slot), and each binary signal is demodulated by passing the pertinent exclusive OR signal through a low-pass filter. This means that each binary signal is demodulated by utilizing the relation between adjacent modulation signals.
However, it is difficult to realize an MSK demodulator, which includes such a low-pass filter as analog element, in the form of a chip by using semiconductor integrated circuit techniques. Such an MSK demodulator, therefore, cannot meed the size reduction demand. It is conceivable to construct the low-pass filter as a digital filter. The digital filter construction, however, requires complicated design and is therefore not practical from the economical standpoint.
An MSK demodulator which does not employ any low-pass filter is disclosed in Japanese Laid-Open Patent Publication No. 6-214143 (hereinafter referred to as Reference 1). In this MSK demodulator, a demodulation symbol in one symbol time is determined by monitoring a delay detection signal, which is obtained by delay detection of one time slot sampling result, in a waveform shaper. In this case, the waveform shaper includes a delay circuit for further delaying the delay detection signal by one symbol time. With this construction, the demodulation of MSK modulation signal can be realized in sole digital signal processing. It is thus possible to readily obtain demodulation symbols using general-purpose microcomputer software.
In the meantime, as a result of researches and investigations conducted by the inventors, it was found that where an MSK signal is digitally processed by sampling an exclusive OR signal obtained by exclusively Oring the MSK signal and a delayed signal obtained by delaying the MSK signal by one time slot, chattering is readily generated between adjacent symbols.
Reference 1 teaches nothing about the chattering that is generated at the moment of transition between adjacent symbols, although it shows the digital processing of the exclusive OR signal. Such chattering disables accurate demodulation to recover symbols. Besides, according to Reference 1 the delay detection signal obtained by the delay detection is further delayed in the waveform shaper by two symbol times to recover symbols. This means that the waveform shaper requires a flip-flop or like circuit element as a delay circuit, which provides a long delay time for symbol-by-symbol delaying. Therefore, the construction is complicated, and long time is required to recover demodulation symbols.